Abstract: When communicating with multiple peripherals, DSP needs to extend the asynchronous serial communication interface. Taking TMS320C6711 as an example, ST16C554 asynchronous serial transceiver is used to introduce the current most advanced C6000 series DSP and multi-channel RS232, RS485 / 422 device communication design scheme, and gives software and hardware implementation examples.
The external interface between DSP and computer can be divided into serial communication port and parallel communication port. Serial communication includes communication using protocols such as RS232, RS485 / 422, USB, IEEE1394, and parallel communication includes communication using protocols such as IEEE488 and IEEE1248. This article mainly introduces the design and implementation of DSP multi-channel RS232, RS485 / 422 communication system, and applies this system to the combination of three-dimensional angular rate measurement of fiber optic gyroscope.
1 System scheme design
1.1 System block diagram
Figure 1 is a block diagram of a DSP multi-channel asynchronous serial communication system. The computer receiving end is a general-purpose data acquisition card, and RS485 / 422 protocol is used between it and DSP, and the communication rate can reach 921.6kBPS. The RS232 protocol is adopted between the fiber optic gyro and the DSP, and the communication rate can reach 115.2 kBPS. This system can realize the communication between DSP and three RS232 devices and one RS485 / RS422 device. 
1.2 Introduction to TMS320C6711
The TMS320C6000 series of DSP chips were originally mainly super-processing chips introduced for signal processing of mobile communication base stations. The TMS320C6711 with a 200MHz clock takes only 66μs to complete the 1024-point FFT algorithm, which is an order of magnitude faster than traditional DSP chips The military field has broad application prospects. In the fields of highly intelligent applications such as military communications, electronic countermeasures, radar systems, and precision-guided weapons, the processing power of this chip has an irreplaceable advantage [2]. TMS320C67XX is a floating point series in TMS320C6000, and TMS320C6711 is one of the chips with better cost performance. Just like other TMS320C6000 series chips, the chip provides two multi-channel synchronous buffer serial ports, and no asynchronous serial ports, so asynchronous serial port expansion is required.
1.3 Communication scheme design
At present, almost all digital signal processors provide one or more serial interfaces, however, most DSP chips provide synchronous serial ports. In practical applications, it is also necessary for the DSP to be able to perform asynchronous serial communication with multiple peripherals. For example, serial data transmission with a PC or fiber optic gyro requires the DSP system to have multiple UART serial interfaces; of course, it can also be The general-purpose I / O port forms a serial port, and the baud rate is set by software (this method is often used when the DSP is not busy). But when these two kinds of I / O lines are occupied or require high real-time performance of communication, DSP should realize high-speed serial communication by expanding asynchronous communication chip.
In view of this situation, this paper studies and implements a simple and reliable asynchronous serial port expansion method, that is, expanding the UART chip on the parallel bus of the DSP, and using hardware to achieve asynchronous data transmission. The advantage of this method is that the software is simple to implement, at the cost of expanding other devices on the bus. Because this program wants to achieve asynchronous serial communication between DSP and four peripherals, considering the convenience of hardware connection and software programming, it uses four-channel ST16C554 serial asynchronous transceiver and multi-channel electronic conversion chip MAX3245E to complete. In this way, four-way asynchronous serial communication can be realized with the simplest hardware connection and software programming.
1.4 Introduction to ST16C554
ST16C554 is EXAR's asynchronous communication chip, its main features are as follows [3]:
· Compatible with ST16C454, ST68C454, ST68C554, TL16C554;
· 16-byte send and receive FIFO;
· Four-channel independent selection of receiving control and sending control;
· Four optional receive FIFO interrupt trigger levels;
· Standard MODEM interface;
· Baud rate up to 1.5M, the baud rate generator is programmable;
· The data bit length is 5, 6, 7, 8, and the stop bit length is 1, 1.5, 2;
· With even parity, odd parity or no parity mode.
ST16C554 can not only perform parallel / serial conversion of the data sent by DSP, but also serial / parallel convert the data received from peripherals or MODEM, and can complete the transmission and reception of four independent channels at the same time. At the same time, ST16C554 also has four independent 16-byte receive and transmit FIFO, which can effectively reduce CPU interrupts by enabling FIFO and setting FIFO interrupt trigger level, improving system efficiency and reliability. 
2 System hardware design
The hardware design block diagram of the system is shown in Figure 2. The hardware system is composed of power conversion circuit, power monitoring circuit, DSP, SDRAM, FLASH ROM, UART, level conversion chip and programmable logic chip. The power conversion circuit completes the DC-DC conversion of 5V to 3.3V / 1.8V, and provides power for all low-voltage chips in the system design. The power supply monitoring circuit is used to monitor all the power supply voltages of the system. When the power supply voltage is lower than the rated value, the DSP and UART are reset to protect the chip. ST16C554 UART completes the communication of four channels A, B, C, and D at the same time, among which three channels A, B, and C complete the asynchronous transmission and reception of three RS232 channels, the baud rate is 115.2kBPS, and the D channel completes the communication of RS485 / 422 , The baud rate is 921.6kBPS, and the baud rate can be set in the corresponding control register. When the external crystal oscillator is 14.7456MHz, the above baud rate setting can be easily completed. Multi-channel UART-RS232 level conversion device MAX3245 conversion rate up to 1MBPS. The programmable logic chip is CPLD (XC9572XL) of XILINX Company, which is used to complete all logic control in the system.
When the DSP reads and writes the UART, it must involve the conversion of the actual address of the UART in the DSP. In this scheme, the CE3 space of the DSP is set to 8-bit asynchronous mode, and the corresponding address range is 0xB0000000 ～ 0xBFFFFFFF. Corresponding to the read and write operation addresses of the UART and the strobe addresses of the four independent channels, the corresponding offsets must be added. The corresponding reading, writing and chip selection logic are completed by CPLD. The corresponding internal logic of CPLD is as follows:
——CE3 COMMUNICATION SPACE ADDR = B0000000—BFFFFFFF
D3: CSF3 <= CE3 OR (NOT EA5); --channel C FOG3ADDR = B0000008
CSF2 <= CE3 OR (NOT EA4);-Channel B FOG2ADDR = B0000004
CSFl <= CE3 OR (NOT EA3); --channel A FOG1ADDR = B0000002
CSF4 <= CE30R (NOT EA2); --channel D RS422ADDR = B0000001
Among them, CSF1 ~ CSF4 is the channel selection signal, low level is effective; EA2 ~ EA5 is the address line of DSP.
3 Software design
The system software design includes the initialization and communication protocol of PC, TMS320C711 and ST16C554. The procedure of initializing ST16C554 for TMS320C711 will be given below in combination with the hardware of this system. The main task of initialization is to set the parameters needed to operate each channel. These parameters include the number of data bits, stop bits, parity, etc. of the data string during serial communication. In addition, you need to set the baud rate and interrupt mode for sending and receiving.
Among them RHR is the receiving holding register, THR is the sending holding register. FCR is the FIFO control register, set to FIFO enable. IER is an interrupt enable register, used in conjunction with FCR, set to FIFO interrupt mode, can also be set to DMA mode. LSR is a linear status register, and it can detect whether there is data in FIFO or RHR by querying the lowest bit. DLL and DLM are baud rate setting registers, and the baud rate is set by dividing the crystal frequency. When the highest bit of the LCR is 1, you can change the settings of the DLL and DLM.
Taking channel A as an example, the C language program initialized by DSP to ST16C554 is as follows:
/ * FOG1 * /
* (char *) 0xb0000032 = 0x80; / * lcr = 80 * ï¼
* (char *) 0xb0000002 = 0x08; / ​​* dll = 08 * ï¼
* (char *) 0xb0000012 = 0x00; / * dlh = 00 * ï¼
* (char *) 0xb0000032 = 0xlb; / * lcr = 1b * ï¼
* (char *) 0xb0000022 = 0x01; / * fcr = 01 * ï¼
* (char *) 0xb0000012 = 0x01; / * ier = 01 * ï¼
* (char *) 0xb0000022 = 0x03; / * fcr = 01 * ï¼
* (char *) 0xb0000022 = 0x01; / * fcr = 01 * ï¼
The four channels are set to FIFO mode and interrupt enable. Channel A, channel B, and channel C are respectively set to RS232 with a baud rate of 115.2kBPS; channel D is set to RS485 / 422 with a baud rate of 921.6kBPS.
The data reading procedure of DSP for channel A is as follows:
while ((readtp & 0x01)! = 0)
{readdata = * (char *) 0xb0000002; / * read rhr * /
readtp = * (char *) 0xb0000052; / * read 1sr * /
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4 Interconnection test with fiber optic gyro
The system is docked with the fiber optic gyroscope, and the test shows that the system fully meets the design requirements.
Figure 3 is the test result of the scale factor of the gyroscope. The abscissa in the figure is the input angular rate, and the ordinate is the voltage output value of the DSP output data after D / A conversion. Multiplied by fitting.
The system's software and hardware have been debugged and passed, and successfully applied to the aerospace fiber optic gyroscope angular velocity measurement system. This solution can flexibly and efficiently complete the asynchronous serial communication between DSP and multiple PCs or sensors (that is, multiple fiber optic gyros), and it can also implement a standard interface with MODEM. In addition, if the DSP's EDMA function is used to complete the sending and receiving, it can further improve the system performance and achieve high-speed serial communication [4].
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